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spo600:endian [2024/01/12 19:59] – created chrisspo600:endian [2024/05/07 20:46] (current) – external edit 127.0.0.1
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 For example, on 6502 systems (with a 8 bit/1 byte word size), the 16-bit value $FFEE stored at address $1000 would be stored like this: For example, on 6502 systems (with a 8 bit/1 byte word size), the 16-bit value $FFEE stored at address $1000 would be stored like this:
  
- $1000 $EE +  $1000 $EE 
- $1001 $FF+  $1001 $FF
  
 Likewise, on an x86_64 system, the 64-bit value 0xFFEEDDCCBBAA9988 would be stored at memory location 0x1000 like this: Likewise, on an x86_64 system, the 64-bit value 0xFFEEDDCCBBAA9988 would be stored at memory location 0x1000 like this:
  
- 0x1000 0x88 +  0x1000 0x88 
- 0x1001 0x99 +  0x1001 0x99 
- 0x1002 0xAA +  0x1002 0xAA 
- 0x1003 0xBB +  0x1003 0xBB 
- 0x1004 0xCC +  0x1004 0xCC 
- 0x1005 0xDD +  0x1005 0xDD 
- 0x1006 0xEE +  0x1006 0xEE 
- 0x1007 0xFF+  0x1007 0xFF
  
 ==== Big-Endian ==== ==== Big-Endian ====
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 For example, on a Motorola 68030 CPU, the value 0xFFEEDDCC would be written at memory location 0x1000 as: For example, on a Motorola 68030 CPU, the value 0xFFEEDDCC would be written at memory location 0x1000 as:
  
- 0x1000 0xFF +  0x1000 0xFF 
- 0x1001 0xEE +  0x1001 0xEE 
- 0x1002 0xDD +  0x1002 0xDD 
- 0x1003 0xCC+  0x1003 0xCC 
 + 
  
 ==== Bi-endian ==== ==== Bi-endian ====
  
-Bi-endian CPUs can store data in either format (though sometimes not instructions). ARM [[AArch32]] and [[AArch64]] systems, PowerPC, Alpha, recent SPARC, MIPS, and Itanium systems are bi-endian.+Bi-endian CPUs can store data in either format (though sometimes not instructions). ARM [[ARMv8#AArch32]] and [[ARMv8#AArch64]] systems, PowerPC, Alpha, recent SPARC, MIPS, and Itanium systems are bi-endian. 
  
 ==== Other Memory Sequences ==== ==== Other Memory Sequences ====
  
-There are a few, rare architectures which store values in a sequence other than strict little-endian or big-endian format. For example, the 32-bit value FFEEDDCCh would be stored by a PDP-11 at address 1000h in this manner:+There are a few, rare architectures which store values in a sequence other than strict little-endian or big-endian format. For example, the 32-bit value FFEEDDCCh (where ''h'' designates a hexadecimal number) would be stored by a PDP-11 at address 1000h in this manner:
  
- 1000h EEh +  1000h EEh 
- 1001h FFh +  1001h FFh 
- 1002h CCh +  1002h CCh 
- 1003h DDh+  1003h DDh
  
 That is, each 16-bit word is stored in little-endian format, but the two 16-bit words are in big-endian sequence. That is, each 16-bit word is stored in little-endian format, but the two 16-bit words are in big-endian sequence.
 +
  
 ==== Significance of Byte Order ==== ==== Significance of Byte Order ====
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 ==== Origin of the Terms ==== ==== Origin of the Terms ====
  
-The terms ''Big-Endian'' and ''Little-Endian'' originally appeared in the classic satirical tale [https://www.gutenberg.org/files/829/829-h/829-h.htm Gulliver's Travels] by Jonathan Swift, where they referred to which end of a boiled egg was to be opened first -- a distinction which led to ongoing conflict between small-minded people.+The terms ''Big-Endian'' and ''Little-Endian'' originally appeared in the classic satirical tale [[https://www.gutenberg.org/files/829/829-h/829-h.htm|Gulliver's Travels]] by Jonathan Swift, where they referred to which end of a boiled egg was to be opened first -- a distinction which led to ongoing conflict between small-minded people.
  
spo600/endian.1705089578.txt.gz · Last modified: 2024/04/16 18:10 (external edit)
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